{
  "added_at": "2026-11-03",
  "additional_evidence_urls": [
    "https://github.com/grandideastudio/jtagulator/blob/6a764cd87315e7823937811a5e6f11051c51be1a/CHANGES.markdown",
    "https://github.com/grandideastudio/jtagulator/blob/6a764cd87315e7823937811a5e6f11051c51be1a/JTAGulator.spin#L2796-L2869",
    "https://github.com/grandideastudio/jtagulator/blob/6a764cd87315e7823937811a5e6f11051c51be1a/JTAGulatorCon.spin",
    "https://github.com/grandideastudio/jtagulator/blob/6a764cd87315e7823937811a5e6f11051c51be1a/PropOCD.spin",
    "https://github.com/grandideastudio/jtagulator/blob/6a764cd87315e7823937811a5e6f11051c51be1a/PropSUMP.spin",
    "https://github.com/grandideastudio/jtagulator/tree/6a764cd87315e7823937811a5e6f11051c51be1a/Hardware/Rev.%20C",
    "https://github.com/grandideastudio/jtagulator/tags",
    "https://expliot.io/jtagulator/"
  ],
  "category": "firmware",
  "description_en": "Joe Grand's open-source hardware tool and Parallax Propeller firmware for locating on-chip debug interfaces among an unfamiliar board's test points, vias, component pads or connectors. Driven from a serial terminal, its 24 level-shifted channels try pin permutations to identify JTAG pinouts by IDCODE or BYPASS scans, SWD pinouts by IDCODE and UART pinouts with their baud rates. With a known JTAG pinout the firmware can also read device IDs, discover instruction and data registers and map a chip's pins to boundary-scan positions with EXTEST, and other modes pass UART traffic through, act as a SUMP-compatible logic analyzer or emulate a Bus Pirate so OpenOCD can use the board as a JTAG adapter.",
  "description_zh": "Joe Grand 开发的开源硬件工具及其 Parallax Propeller 固件，用于在陌生电路板的测试点、过孔、元件焊盘或连接器中找出片上调试接口。它通过串口终端操作，用 24 路电平转换通道逐一尝试引脚排列：以 IDCODE 或 BYPASS 扫描识别 JTAG 引脚，以 IDCODE 识别 SWD 引脚，并识别 UART 引脚及其波特率。已知 JTAG 引脚后，固件还能读取器件 ID、探测指令寄存器和数据寄存器，并用 EXTEST 把芯片引脚对应到边界扫描寄存器中的位置；其他模式可透传 UART 数据、充当兼容 SUMP 的逻辑分析仪，或模拟 Bus Pirate，让 OpenOCD 把它当作 JTAG 适配器使用。",
  "entry_url": "https://awesomerea.org/resources/jtagulator/",
  "entry_url_zh": "https://awesomerea.org/zh/resources/jtagulator/",
  "evidence_url": "https://github.com/grandideastudio/jtagulator/blob/6a764cd87315e7823937811a5e6f11051c51be1a/README.markdown",
  "group": "tools",
  "id": "jtagulator",
  "json_url": "https://awesomerea.org/resources/jtagulator/record.json",
  "kind": "tool",
  "markdown_url": "https://awesomerea.org/resources/jtagulator/index.md",
  "markdown_url_zh": "https://awesomerea.org/zh/resources/jtagulator/index.md",
  "name": "JTAGulator",
  "name_zh": "JTAGulator 片上调试接口识别工具",
  "record_type": "resource",
  "relationship": "foundation",
  "requirements": [
    "Firmware 1.12, tagged 2023-06-05, is the newest version; the repository publishes tags but no GitHub releases, and the README calls master a development branch whose interim commits may be unstable. Later commits, up to the reviewed one of 2026-09-02, update links and the license text and add the Rev. C hardware design files, and since July 2025 the README names EXPLIoT as maintainer and supporter.",
    "Requires JTAGulator hardware, for which the repository commits the Rev. C design files (Altium project, Gerbers, schematic, bill of materials, assembly drawing and test procedure), a serial terminal on the host and physical wiring to the target's candidate pins. The target I/O voltage, 1.4–3.3 V, must be set before scanning, and the firmware warns that use may affect target behavior; it also warns that its front-end circuitry is incompatible with many SWD-based targets and points to hardware modifications described in the wiki.",
    "The firmware is Spin code for the Propeller P8X32A: the README recommends Propeller Tool 1.3.2 for Windows and calls other environments untested and unsupported, while also giving OpenSpin and PropLoader commands for compiling, loading to RAM or writing to EEPROM. The repository commits the compiled image JTAGulator.eeprom (32 KB), last updated for 1.12. The OpenOCD and logic-analyzer modes need OpenOCD's Bus Pirate driver or an Openbench Logic Sniffer client, and both persist across resets and firmware updates until exited manually.",
    "The README distributes the design under CC BY-SA 4.0 and says the JTAGulator name and logo are registered trademarks of Grand Idea Studio that may not be used on derived works without permission; the Spin source headers still state CC BY 3.0 United States, and GitHub detects no license."
  ],
  "requirements_zh": [
    "最新固件版本为 1.12，于 2023-06-05 打标签；仓库只发布标签，没有 GitHub 发行版，README 称 master 是开发分支，其间的提交可能不稳定。此后直到所审阅的 2026-09-02 提交，改动包括更新链接和许可说明，以及加入 Rev. C 硬件设计文件；README 称自 2025 年 7 月起由 EXPLIoT 负责维护和支持。",
    "需要 JTAGulator 硬件（仓库提交了 Rev. C 的设计文件，包括 Altium 工程、Gerber 文件、原理图、物料清单、装配图和测试流程）、主机上的串口终端，以及与目标候选引脚的实际接线。扫描前必须设置目标 I/O 电压（1.4–3.3 V），固件提示使用时可能影响目标系统的行为；固件还提示其前端电路与许多基于 SWD 的目标不兼容，并指向 wiki 中介绍的硬件改装方法。",
    "固件是面向 Propeller P8X32A 的 Spin 代码：README 推荐使用 Windows 版 Propeller Tool 1.3.2，称其他开发环境未经测试且不受支持，同时也给出了用 OpenSpin 编译、用 PropLoader 加载到 RAM 或写入 EEPROM 的命令。仓库提交了已编译的固件映像 JTAGulator.eeprom（32 KB），最后一次更新对应 1.12 版。OpenOCD 模式和逻辑分析仪模式分别需要 OpenOCD 的 Bus Pirate 驱动或 Openbench Logic Sniffer 客户端软件，这两种模式在复位和固件更新后仍会保持，只能由用户手动退出。",
    "README 称该设计以 CC BY-SA 4.0 许可发布，JTAGulator 名称和标志是 Grand Idea Studio 的注册商标，未经许可不得用于衍生作品；而 Spin 源码文件头仍写着 CC BY 3.0 United States，GitHub 也未识别出许可证。"
  ],
  "targets": [
    "firmware"
  ],
  "url": "https://github.com/grandideastudio/jtagulator",
  "verification": "source-reviewed",
  "verified_at": "2026-10-27"
}